Decimal Arithmetic Bibliography

Bibliography of material on Decimal Arithmetic

This collection of references forms a bibliography of Decimal Arithmetic, with the emphasis on computer implementations of arithmetic.

For general background on why decimal arithmetic is important, a decimal FAQ, decimal arithmetic specifications and testcases, and other World Wide Web links, please see the General Decimal Arithmetic pages.

This list is alphabetic by first author (a categorized collection and a list sorted by year of publication are also available).

For books, and papers with no formal abstract, the Abstract material is quoted from an introductory section or (occasionally, for books only) back cover matter. Omitted material is indicated by ellipses (...).

Please send any comments, corrections, or additions to Mike Cowlishaw, mfc@uk.ibm.com.

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abbott1999 URL ¿Web?	Architecture and software support in IBM S/390 Parallel Enterprise Servers for IEEE Floating-Point arithmetic, Paul H. Abbott et al, IBM Journal of Research and Development, Vol. 43 #5/6, pp723–760, IBM, September/November 1999. Abstract: IEEE Binary Floating-Point is an industry-standard architecture. The IBM System/360 hexadecimal floating-point architecture predates the IEEE standard and has been carried forward through the System/370 to current System/390 processors. The growing importance of industry standards and floating-point combined to produce a need for IEEE Floating-Point on System/390. At the same time, customer investment in IBM floating-point had to be preserved. This paper describes the architecture, hardware, and software efforts that combined to produce a conforming implementation of IEEE Floating-Point on System/390 while retaining compatibility with the original IBM architecture.
aber1992 ¿Web?	Precise Computation Using Range Arithmetic, via C++, Oliver Aberth and Mark J Schaefer, ACM Transactions on Mathematical Software, Vol. 18 #4, pp481–491, ACM Press, December 1992. Abstract: An arithmetic is described that can replace floating-point arithmetic for programming tasks requiring assured accuracy. A general explanation is given of how the arithmetic is constructed with C++, and a programming example in this language is supplied. Times for solving representative problems are presented.
agrawal1974 ¿Web?	Fast B. C. D. Multiplier, Dharma P. Agrawal, Electronics Letters, Vol. 10 #12, pp237–238, IEE, 13 June 1974. Abstract: A fast b.c.d multiplier is proposed, based on obtaining the product of a 1-digit multiplicand and a 1-digit multiplier in a single row of adders. For high-speed operation, the carry-save technique, universally adopted for binary multipliers, is used.
aharoni2007 URL ¿Web?	Solving Constraints on the Intermediate Result of Decimal Floating-Point Operations, Merav Aharoni, Ron Maharik, and Abraham Ziv, Proceedings of the 18th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-2854-6, ISBN 978-0-7695-2854-0, pp38–45, IEEE, June 2007. Abstract: The draft revision of the IEEE Standard for Floating- Point Arithmetic (IEEE P754) includes a definition for decimal floating-point (FP) in addition to the widely used binary FP specification. The decimal standard raises new concerns with regard to the verification of hardware- and software-based designs. The verification process normally emphasizes intricate corner cases and uncommon events. The decimal format introduces several new classes of such events in addition to those characteristic of binary FP. Our work addresses the following problem: Given a decimal floating-point operation, a constraint on the intermediate result, and a constraint on the representation selected for the result, find random inputs for the operation that yield an intermediate result compatible with these specifications. The paper supplies efficient analytic solutions for addition and for some cases of multiplication and division. We provide probabilistic algorithms for the remaining cases. These algorithms prove to be efficient in the actual implementation.
ahmad1987 ¿Web?	Implementable Decimal Arithmetic Algorithms for Micro/Minicomputers, M. Ahmad, Microprocessing and Microprogramming, Vol. 19 #2, pp119–128, February 1987. Abstract: The need for efficient decimal arithmetic and its ever increasing applications in micro/minicomputers and microprocessor based equipment and appliances has been emphasised. Some algorithms suitable for implementation for decimal arithmetic operations of BCD packed decimal numbers have been suggested. These algorithms employ comparatively faster instructions available on most of the microprocessors and provide efficient and faster decimal arithmetic.
allard1963 ¿Web?	Mixed Congruential Random Number Generators for Decimal Machines, J. L. Allard, A. R. Dobell, and T. E. Hull, Journal of the ACM, Vol. 10 #2, pp131–141, ACM Press, April 1963. Abstract: Random number generators of the mixed eongruential type have recently been proposed. They appear to have some advantages over those of the multiplicative congruential type, but they have not been thoroughly tested. This paper summarizes the results of extensive testing of these generators which has been carried out on a decimal machine. Most results are for word length 10, and special attention is given to simple multipliers which give fast generators. But other word lengths and many other multipliers are considered. A variety of additive constants is also used. It turns out that these mixed generators, in contrast to the multiplicative ones, are not consistently good from a statistical point of view. The cases which are bad seem to belong to a well-defined class which, unfor unfortunately, includes most of the generators associated with the simple multipliers. However, a surprise result is that all generators associated with one of the simplest and fastest multipliers, namely 101, turn out to be consistently good for word lengths greater than seven digits. A final section of the paper suggests a simple theoretical explanation of these experimental results.
allison2006 ¿Web?	Where did all my decimals go?, Chuck Allison, Computing Sciences in Colleges, Vol. 21 #3, pp47–59, Consortium for Computing Sciences in Colleges, February 2006. Abstract: It is tremendously ironic that computers were invented with number crunching in mind, yet nowadays most CS graduates leave school with little or no experience with the intricacies of numeric computation. This paper surveys what every CS graduate should know about floating-point arithmetic, based on experience teaching a recently-created course on modern numerical software development.
ansi1976 ¿Web?	ANSI X3.53-l976: American National Standard – Programming Language PL/I, J. F. Auwaerter, 421pp, ANSI, 1976. Abstract: This document defines American National Standard Programming Language PL/I and specifies both the form and interpretation of computer programs written in PL/I. The standard is intended to provide a high degree of machine independence and thereby facilitate program exchange among a variety of computing systems. The document serves as an authoritative reference rather than as a tutorial exposition. The language is defined by specifying a conceptual PL/I machine which translates and interprets intended PL/I programs. The relationship between an actual implementation of PL/I and the conceptual machine presented in this document is also given. This reference document was developed jointly under the auspices of the American National Standards Institute and the European Computer Manufacturers Association. Note: Reaffirmed 1998.
ansi1996 ¿Web?	ANSI X3.274-1996: American National Standard for Information Technology – Programming Language REXX, Brian Marks and Neil Milsted, 167pp, ANSI, February 1996. Abstract: This standard provides an unambiguous definition of the programming language REXX. Its purpose is to facilitate portability of REXX programs for use on a wide variety of computer systems. Note: Errata also available, as ANSI X3.274-1996/AM 1-2000.
arazi1992 ¿Web?	*Binary-to-Decimal Conversion Based on the Divisibility of 2⁸-1 [255]* by 5*, B. Arazi and D. Naccache, Electronic Letters, Vol. 28 #3, pp2151–2152, IEE, November 1992. Abstract:* The Letter treats the case of converting a binary value, represented in the form of n bytes, into a decimal value, represented in the form of m BCD characters. The conversion, which is suitable for one-byte and two-byte processors, is based on the following observations: (a) 5 is a divisor of 2⁸-1 and 2¹⁶-1. (b) Modular binary arithmetic over 2^r-1 is easily performed. (c) Binary division by 2^r-1, in the case where the remainder is known to be zero, is easily performed. (d) All the prime factors of 2⁸-1 and 2¹⁶-1 are of the form 2^r+1.
ashen1959 ¿Web?	Unnormalized Floating Point Arithmetic, R. L. Ashenhurst and N. Metropolis, Journal of the ACM, Vol. 6 #3, pp415–428, ACM Press, July 1959. Abstract: Algorithms for floating point computer arithmetic are described, in which fractional parts are not subject to the usual normalization convention. These algorithms give results in a form which furnishes some indication of their degree of precision. An analysis of one-stage error propagation is developed for each operation; a suggested statistical model for long run error propagation is also set forth.
auzing1985 ¿Web?	Accurate Arithmetic Results for Decimal Data on Non-Decimal Computers, Winfried Auzinger and H. J. Stetter, Computing, 35, pp141–151, 1985. Abstract: Recently, techniques have been devised and implemented which permit the computation of smallest enclosing machine number interval for the exact results of a good number of highly composite operations. These exact results refer, however, to the data as they are represented in the computer. This note shows how the conversion of decimal data into non-decimal representations may be joined with the mathematical operation on the data into one high-accuracy algorithm. Such an algorithm is explicitly presented for the solution of systems of linear equations.

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babu2005 ¿Web?	Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-bit Parallel Adder, Hafiz Md. Hasan Babu and Ahsan Raja Chowdhury, Proceedings of the 18th International Conference on VLSI Design (VLSID 2005), ISBN 0-7695-2264-5, pp255–260, IEEE, 2005. Abstract: In this paper, we have proposed a design technique for the reversible circuit of binary coded decimal (BCD) adder. The proposed circuit has the ability to add two 4-bits binary variables and it transforms the addition into the appropriate BCD number with efficient error correcting modules where the operations are reversible. We also show that the proposed design technique generates the reversible BCD adder circuit with minimum number of gates as well as the minimum number of garbage outputs.
bashe1954 ¿Web?	The IBM Type 702, An Electronic Data Processing Machine for Business, C. J. Bashe, W. Buchholz, and N. Rochester, Journal of the ACM (JACM), Vol. 1 #4, pp149–169, ACM Press, October 1954. Abstract: The main features of the IBM Electronic Data Processing Machine, Type 702, are discussed from the programmer’s point of view to illustrate how it was designed specifically to solve large accounting and statistical problems in business, industry, and government. The 702 exploits in one integrated system the high speed and storage capacity of magnetic tape, the accessibility of electrostatic memory supplemented by large auxiliary storage on magnetic drums, the flexibility of punched-card document input, the page printing output of modern accounting machines, and the technology of general-purpose, stored-program, electronic computers. The 702 is a serial machine with decimal arithmetic. Its serial nature provides several unusual logical features of great aid in programming accounting problems.
bata1971 ¿Web?	The Gamma 60: The computer that was ahead of its time, M. Bataille, Honeywell Computer Journal Vol. 5 #3, pp99–105, Honeywell, 1971. Abstract: Prior to 1960 the Compagnie des Machines Bull (now Honeywell Bull) delivered the first large computer system with an architecture designed for multiprogramming. Many unique features of the Gamma 60 were forerunners of present system architecture concepts. This article revisits these concepts.
beebe2007a ¿Web?	Extending TeX and METAFONT with floating-point arithmetic, Nelson H.F. Beebe, Proceedings of TUG 2007, TUGboat Vol. 28 #3, ISSN 0896-3207, pp319–328, TeX User's Group, July 2007. Abstract: The article surveys the state of arithmetic in TeX and METAFONT, suggests that they could usefully be extended to support floating-point arithmetic, and shows how this could be done with a relatively small effort, without loss of the important feature of platform-independent results from those programs, and without invalidating any existing documents, or software written for those programs, including output drivers.
bernal2006 ¿Web?	Integer Representation of Decimal Numbers for Exact Computations, Javier Bernal and Christoph Witzgall, Journal of Research of the National Institute of Standards and Technology, Vol. 111 #2, pp79–88, National Institute of Standards and Technology, March-April 2006. Abstract: A scheme is presented and software is documented for representing as integers input decimal numbers that have been stored in a computer as double precision floating point numbers and for carrying out multiplications, additions and subtractions based on these numbers in an exact manner. The input decimal numbers must not have more than nine digits to the left of the decimal point. The decimal fractions of their floating point representations are all first rounded off at a prespecified location, a location no more than nine digits away from the decimal point. The number of digits to the left of the decimal point for each input number besides not being allowed to exceed nine must then be such that the total number of digits from the leftmost digit of the number to the location where round-off is to occur does not exceed fourteen.
bhat2007 ¿Web?	Performance Characterization of Decimal Arithmetic in Commercial Java Workloads, M. Bhat, J. Crawford, R. Morin, and K. Shiv, IEEE International Symposium on Performance Analysis of Systems & Software, 2007 (ISPASS 2007), pp54–61, IEEE, April 2007. Abstract: Binary floating-point numbers with finite precision cannot represent all decimal numbers with complete accuracy. This can often lead to errors while performing calculations involving floating point numbers. For this reason many commercial applications use special decimal representations for performing these calculations, but their use carries performance costs such as bi-directional conversion. The purpose of this study was to understand the total application performance impact of using these decimal representations in commercial workloads, and provide a foundation of data to justify pursuing optimized hardware support for decimal math. In Java, a popular development environment for commercial applications, the BigDecimal class is used for performing accurate decimal computations. BigDecimal provides operations for arithmetic, scale manipulation, rounding, comparison, hashing, and format conversion. We studied the impact of BigDecimal usage on the performance of server-side Java applications by analyzing its usage on two standard enterprise benchmarks, SPECjbb2005 and SPECjAppServer2004 as well as a real-life mission-critical financial workload, Morgan Stanley’s Trade Completion. In this paper, we present detailed performance characteristics and we conclude that, relative to total application performance, the overhead of using software decimal implementations is low, and at least from the point of view of these workloads, there is insufficient performance justification to pursue hardware solutions
bohl1987 ¿Web?	A Decimal Floating-Point Processor for Optimal Arithmetic, G. Bohlender and T. Teufel, Computer arithmetic: Scientific Computation and Programming Languages, ISBN 3-519-02448-9, pp31–58, B. G. Teubner Stuttgart, 1987. Abstract: A floating-point processor for optimal arithmetic should perform scalar products with maximum accuracy in addition to the usual operations +, -, , /. This means that scalar products have to be computed with an error of at most one bit of the least significant digit, even if cancellation of leading digits occurs. In order to avoid conversion errors during input and output of numerical data, the decimal number system should be chosen. The arithmetic processor BAP-SC performs these operations in a 64 bit floating-point format with 13 decimal digits in the mantissa. The prototype is built in bit-slice technology on wire-wrap boards. Interfaces have been developed [sic*] for several busses and computers. The arithmetic processor is fully integrated in the programming language PASCAL-SC. It supports operations in higher numerical spaces and new numerical algorithms that compute verified results with error bounds.
bohl1991 ¿Web?	Decimal Floating-Point Arithmetic in Binary Representation, Gerd Bohlender, Computer arithmetic: Scientific Computation and Mathematical Modelling (Proceedings of the Second International Conference, Albena, Bulgaria, 24-28 September 1990), pp13–27, J. C. Baltzer AG, 1991. Abstract: The binary representation of decimal floating-point numbers permits an efficient implementation of the proposed radix independent IEEE standard for floating-point arithmetic, as far as storage space is concerned. Unfortunately the left and right shifts occurring in the arithmetic operations are very complicated and slow in this representation. In the present paper therefore methods are proposed which speed up these shifts; in particular a kind of carry look-ahead technique is used for division. These methods can be combined to construct a decimal shifter which is needed in an ALU for decimal arithmetic.
borl1985 URL ¿Web?	Turbo Pascal Version 3.0 Reference Manual, Borland International, ISBN 0-87524-003-8, 386pp, Borland International, April 1985. Abstract: Turbo Pascal 3 was the first Turbo Pascal version to support the Intel 8087 math co-processor (16-bit PC version). It also included support for Binary Coded Decimal (BCD) math to eliminate round off errors in business applications. Turbo Pascal 3 also allowed you to build larger programs (> 64k bytes) using overlays. The PC version also supported Turtle Graphics, Color, Sound, Window Routines, and more.
brent1973 ¿Web?	On the Precision Attainable with Various Floating-point Number Systems, Richard P. Brent, IEEE Transactions on Computers, Vol. C-22 #6, pp601–607, IEEE, June 1973. Abstract: For scientific computations on a digital computer the set of real numbers is usually approximated by a finite set F of “floating-point” numbers. We compare the numerical accuracy possible with difference choices of F having approximately the same range and requiring the same word length. In particular, we compare different choices of base (or radix) in the usual floating-point systems. The emphasis is on the choice of F, not on the details of the number representation or the arithmetic, but both rounded and truncated arithmetic are considered. Theoretical results are given, and some simulations of typical floating-point computations (forming sums, solving systems of linear equations, finding eigenvalues) are described. If the leading fraction bit of a normalized base 2 number is not stored explicitly (saving a bit), and the criterion is to minimize the mean square roundoff error, then base 2 is best. If unnormalized numbers are allowed, so the first bit must be stored explicitly, then base 4 (or sometimes base 8) is the best of the usual systems.
brent1976 URL ¿Web?	Fast multiple-precision evaluation of elementary functions, Richard P. Brent, Journal of the ACM, Vol. 23 #2, pp242–251, ACM Press, April 1976. Abstract: Let f(x) be one of the usual elementary functions (exp, log, artan, sin, cosh, etc.), and let M(n) be the number of single-precision operations required to multiply n-bit integers. It is shown that f(x) can be evaluated, with relative error O(2^-n), in O(M(n)log(n)) operations, for any floating-point number x (with an n-bit fraction) in a suitable finite interval. From the Schönhage-Strassen bound on M(n), it follows that an n-bit approximation to f(x) may be evaluated in O(n(log(n))²loglog(n)) operations. Special cases include the evaluation of constants such as pi, e, and e^pi. The algorithms depend on the theory of elliptic integrals, using the arithmetic-geometric
brent1981 URL ¿Web?	MP User's Guide (Fourth Edition), Richard P. Brent, 73pp, Dept. Computer Science, Australian National University, Canberra, TR-CS-81-08, June 1981. Abstract: MP is a multiple-precision floating-point arithmetic package. It is almost completely machine-independent, and should run on any machine with an ANSI Standard Fortran (ANS X3.9-1966) compiler, sufficient memory, and a wordlength (for integer arithmetic) of at least 16 bits. A precompiler (Augment) which facilitates the use of the MP package is available. ... MP works with normalized floating-point numbers. The base (B) and number of digits (T) are arbitrary, subject to some restrictions given below, and may be varied dynamically. ...
brosgol1992 ¿Web?	An Ada Decimal Arithmetic Capability, Benjamin M. Brosgol, Robert I. Eachus, and David E. Emery, CrossTalk, The Journal of Defense Software Engineering, Number 36, 8 (approx)pp, US Air Force Software Technology Support Center, September 1992. Abstract: (None.) Support for financial processing requires suitable arithmetic facilities, representation control, and formatted output. This paper ... describes the possible approaches to the problem, the solution that the authors have developed, and the rationale for the choice. The name chosen for the solution, ADAR, stands for “Ada Decimal Arithmetic and Representations”
brosgol1994 ¿Web?	Information Systems Development in Ada, Benjamin M. Brosgol, Robert I. Eachus, and David E. Emery, Eleventh Annual Washington Ada Symposium, pp2–16, ACM Press, June 1994. Abstract: (None.) In this paper we survey how to use Ada (both Ada 83 and Ada 9X) for IS applications, with a focus on two principal issues: Specification of the information architecture of an IS application, and Programming techniques relevant to financial and related applications. We cover both the language features and the supplemental packages for IS development. Special attention will be paid to the Ada Decimal-Associated Reusabilia (“ADAR”) components for Ada 83 and transitioning to Ada 9X.
brown1969 ¿Web?	The Choice of Base, W. S. Brown and P. L. Richman, Communications of the ACM, Vol. 12 #10, pp560–561, ACM Press, October 1969. Abstract: A digital computer is considered, whose memory words are composed of N r-state devices plus two sign bits (two state devices). The choice of base b for the internal representation of floating-point numbers on such a computer is discussed. It is shown that in a certain sense b = r is best.
brown1974a ¿Web?	Some error correcting codes for certain transposition and transcription errors in decimal integers, D. A. H. Brown, The Computer Journal, Vol. 17 #1, pp9–12, OUP, February 1974. Abstract: The standard theory of modulus 11 cyclic block error-correcting codes is applied to numbers expressed in the decimal system. An algorithm for error correction is given.
brown1974b ¿Web?	Biquinary decimal error detection codes with one, two and three check digits, D. A. H. Brown, The Computer Journal, Vol. 17 #3, pp201–204, OUP, August 1974. Abstract: The biquinary system of representing the decimal integers 0 to 9 is combined with polynomial coding to produce true decimal codes having any required number of check digits added to an integer of any length.
buch1959 ¿Web?	Fingers or Fists? (The Choice of Decimal or Binary representation), Werner Buchholz, Communications of the ACM, Vol. 2 #12, pp3–11, ACM Press, December 1959. Abstract: The binary number system offers many advantages over a decimal representation for a high-perfornmnee, general-purpose computer. The greater simplicity of a binary arithmetic unit and the greater compactness of binary numbers both contribute directly to arithmetic speed. Less obvious and perhaps more important is the way binary addressing and instruction formats can increase the overall performance. Binary addresses are also essential to certain powerful operations which are not practical with decimal instruction formats. On the other hand, decimal numbers are essential for communicating between man and the computer. In applications requiring the processing of a large volume of inherently decimal input and output data, the time for decimal-binary conversion needed by a purely binary computer may be significant. A slower decimal adder may take less time than a fast binary adder doing an addition and two conversions. A careful review ef the significance of decimal and binary number systems led to the adoption in the IBM STRETCH computer of binary addressing and both binary and decimal data arithmetic, supplemented by efficient conversion instructions. Note: Letters to the edtor in response to this paper were published in CACM, Vol. 3, #3, March 1960.
burg1996 ¿Web?	Printing Floating-Point Numbers Quickly and Accurately, Robert G. Burger and R. Kent Dybvig, Proceedings of the ACM SIGPLAN '96 conference on Programming language design and implementation, pp108–116, ACM Press, 1996. Abstract: This paper presents a fast and accurate algorithm for printing floating-point numbers in both free- and fixed-format modes. In free-format mode, the algorithm generates the shortest, correctly rounded output string that converts to the same number when read back in, accommodating whatever rounding mode the reader uses. In fixed-format mode, the algorithm generates a correctly rounded output string using special # marks to denote insignificant trailing digits. For both modes, the algorithm employs a fast estimator to scale floating-point numbers efficiently.
burks1946 ¿Web?	Preliminary discussion of the logical design of an electronic computing instrument, Arthur W. Burks, Herman H. Goldstine, and John von Neumann, 42pp, Inst. for Advanced Study, Princeton, N. J., June 28, 1946. Abstract: Inasmuch as the completed device will be a general-purpose computing machine it should contain certain main organs relating to arithmetic, memory-storage, control and connection with the human operator. It is intended that the machine be fully automatic in character, i.e. independent of the human operator after the computation starts... Note: Reprinted in von Neumann’s Collected Works, Vol. 5, A. H. Taub, Ed. (Pergamon, London, 1963), pp 34-79, and also in Computer Structures: Reading and Examples, Bell & Newell, McGraw-Hill Inc., 1971. Now widely available on the Internet. Contract W-36-034-ORD-H81. R&D Service, Ordnance Department, US Army and Institute for Advanced Study, Princeton
burro1964 ¿Web?	Burroughs B5500 Information Processing Systems Reference Manual, Burroughs Corporation, 224pp, Burroughs Corporation, Detroit, Michigan, 1964. Abstract: This reference manual describes the hardware characteristics of the Burroughs B 5500 Information Processing System by presenting detailed information concerning the functional operation of the entire system. The B 5500 is a large-scale, high-speed, solid-state computer which represents a departure from the conventional computer system concept. It is a problem language oriented system rather than the conventional hardware oriented system. Because of the design concept of the B 5500, there exists a strong interdependence between the hardware and the Master Control Program which directs the system. The material presented herein pertains only to the hardware considerations, whereas the Master Control Program is discussed under separate cover.
busa2001 ¿Web?	The IBM z900 Decimal Arithmetic Unit, Fadi Y. Busaba, Christopher A. Krygowski, Wen H. Li, Eric M. Schwarz, and Steven R. Carlough, Conference Record of the 35th Asilomar Conference on Signals, Systems and Computers, Vol. 2, ISBN 0 7803 7147 X, pp1335–1339, IEEE, Nov. 2001. Abstract: As the cost for adding function to a processor continues to decline, processor designs are including many additional features. An example of this trend is the appearance of graphics engines and compression engines on midrange and even low end microprocessors. One area that has the potential to capture chip real estate is the decimal arithmetic engine because of its importance in financial and business applications. Studies show that 55% of the numeric data stored on commercial databases are in decimal format. Although decimal arithmetic is supported in many software languages it is not yet available on many microprocessors. This paper details the decimal arithmetic engine in the recently announced z900 microprocessor. Note: IEEE cat #01ch37256.

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carre1995 ¿Web?	Specification of the IEEE-854 Floating-Point Standard in HOL and PVS, Victor A. Carreño and Paul S. Miner, HOL95: Eighth International Workshop on Higher-Order Logic Theorem Proving and Its Applications, 16pp, Brigham Young University, September 1995. Abstract: The IEEE-854 Standard for radix-independent floating-point arithmetic has been partially defined within two mechanical verication systems. We present the specication of key parts of the standard in both HOL and PVS. This effort to formalize IEEE-854 has given the opportunity to compare the styles imposed by the two verification systems on the specification.
castell2006 ¿Web?	A 64-bit Decimal Floating-Point Comparator, Ivan D. Castellanos and James E. Stine, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), pp138–144, IEEE, 2006. Abstract: Decimal arithmetic is growing in importance as scientific studies reveal that current financial and commercial applications spend a high percentage overhead in this type of calculations. Typically, software is utilized to emulate decimal floating point arithmetic in these applications. On the other hand, functional units that employ decimal floating point hardware can improve performance by two or three orders of magnitude. This paper presents the design and implementation of a novel decimal floating-point comparator compliant with the current draft revision of the IEEE-754 Standard for floating-point arithmetic. It utilizes a novel BCD magnitude comparator with logarithmic delay and it supports 64-bit decimal floating-point numbers. Area and delay results are examined for an implementation in TSMC SCN6M SCMOS technology.
chart1966 ¿Web?	Automatic Controlled Precision Calculations, Bruce A. Chartres, Journal of the ACM, Vol. 13 #3, pp386–403, ACM Press, July 1966. Abstract: Recent developments in computer design and error analysis have made feasible the use of variable precision arithmetic and the preparation of programs that automatically determine their own precision requirements. Such programs enable the user to specify the accuracy he wants, and yield answers guaranteed to lie within the bounds prescribed. A class of such programs, called “contracting error programs”, is defined in which the precision is determined by prescribing error bounds on the data. A variant of interval arithmetic is defined which enables a limited class of algorithms to be programmed as contracting error programs. A contracting error program for the solution of simultaneous linear equations is described, demonstrating the application of the idea to a wider class of problems.
chen1971 URL ¿Web?	Decimal Number Compression, Tien Chi Chen, Internal IBM memo to Dr. Irving T. Ho, 4pp, IBM, 29 March 1971. Abstract: The fact that four bits can represent 16 different states, but a decimal digit exploits only 10 of then (0-9) has been a valid criticism against decimal arithmetic. On the other hand, it is well known that a number with several decimal digits can be reexpressed into binary, leading to a 20% gain in the number of bits used. Examples are, two decimal digits (8 bits) reexpressed as a seven-bit number and three decimal digits (twelve bits) reexpressed as a ten-bit number. ... Note: Available at: `http://www2.hursley.ibm.com/decimal/chen1971-memo-to-Ho.pdf`
chen1975 ¿Web?	Storage-Efficient Representation of Decimal Data, Tien Chi Chen and Irving T. Ho, CACM Vol. 18 #2, pp49–52, ACM Press, January 1975. Abstract: Usually n decimal digits are represented by 4n bits in computers. Actually, two BCD digits can be compressed optimally and reversibly into 7 bits, and three digits into 10 bits, by a very simple algorithm based on the fixed-length combination of two variable field-length encodings. In over half of the cases the compressed code results from the conventional BCD code by simple removal of redundant 0 bits. A long decimal message can be subdivided into three-digit blocks, and separately compressed; the result differs from the asymptotic minimum length by only 0.34 percent. The hardware requirement is small, and the mappings can be done manually.
chroust1981 ¿Web?	Method of Adding Decimal Numbers by Means of Binary Arithmetic, G. Chroust, IBM Technical Disclosure Bulletin, 03-81, pp4525–4526, IBM, March 1981. Abstract: The simulation of decimal arithmetic on a machine without packed arithmetic necessitates a method for simulating decimal addition by binary arithmetic. Decimal addition simulation is effected by simultaneously applying the following steps to as many digits (d1, d2, .., dn) of the decimal number as fit into the (binary = bin) word length of the object machine. 1. (Binary) addition of the two operands, 2. adding a `6’ in each digit position (this generates the correct carry), and 3. subtracting a `6’ in those places from which no carry resulted.
clen1984 ¿Web?	Beyond Floating Point, C. W. Clenshaw and F. W. J. Olver, Journal of the ACM, Vol. 31 #2, pp319–328, ACM Press, April 1984. Abstract: A new number system is proposed for computer arithmetic based on iterated exponential functions. The main advantage is to eradicate overflow and underflow, but there are several other advantages and these are described and discussed.
clinger1990 ¿Web?	How to read floating point numbers accurately, William D. Clinger, Proceedings of the ACM SIGPLAN '90 Conference on Programming Language Design and Implementation, pp92–101, ACM Press, June 1990. Abstract: Consider the problem of converting decimal scientific notation for a number into the best binary floating point approximation to that number, for some fixed precision. This problem cannot be solved using arithmetic of any fixed precision. Hence the IEEE Standard for Binary Floating-Point Arithmetic does not require the result of such a conversion to be the best approximation. This paper presents an efficient algorithm that always finds the best approximation. The algorithm uses a few extra bits of precision to compute an IEEE-conforming approximation while testing an intermediate result to determine whether the approximation could be other than the best. If the approximation might not be the best, then the best approximation is determined by a few simple operations on multiple-precision integers, where the precision is determined by the input. When using 64 bits of precision to compute IEEE double precision results, the algorithm avoids higher-precision arithmetic over 99% of the time. The input problem considered by this paper is the inverse of an output problem considered by Steele and White: Given a binary floating point number, print a correctly rounded decimal representation of it using the smallest number of digits that will allow the number to be read without loss of accuracy. The Steele and White algorithm assumes that the input problem is solved; an imperfect solution to the input problem, as allowed by the IEEE standard and ubiquitous in current practice, defeats the purpose of their algorithm.
cody1980 ¿Web?	Software Manual for the Elementary Functions, W. J. Cody and W. Waite, ISBN 0-13-822064-6, 269pp, Prentice-Hall, 1980.
cody1984 ¿Web?	A Proposed Radix- and Word-length-independent Standard for Floating-point Arithmetic, W. J. Cody, J. T. Coonen, D. M. Gay, K. Hanson, D. Hough, W. Kahan, R. Karpinski, J. Palmer, F. N. Ris, and D. Stevenson, IEEE Micro magazine, Vol. 4 #4, pp86–100, IEEE, August 1984. Abstract: This article places [Draft 1.0 of IEEE 854] before the public for the first time. ... This article also includes material that describes how decisions were reached in preparing the P854 draft and explains how to overcome some of the implementation problems. Note: Reprinted in ACM SIGNUM, Vol. 20, #1, pp35-51, 1985.
cohen1983 ¿Web?	CADAC: A Controlled-Precision Decimal Arithmetic Unit, Marty S. Cohen, T. E. Hull, and V. Carl Hamacher, IEEE Transactions on Computers, Vol. 32 #4, pp370–377, IEEE, April 1983. Abstract: This paper describes the design of an arithmetic unit called CADAC (clean arithmetic with decimal base and controlled precision). Programming language specifications for carrying out “ideal” floating-point arithmetic are described first. These specifications include detailed requirements for dynamic precision control and exception handling, along with both complex and interval arithmetic at the level of a programming language such as Fortran or PL/I. CADAC is an arithmetic unit which performs the four floating-point operations add/subtract/multiply/divide on decimal numbers in such a way as to support all the language requirements efficiently. A three-level pipeline is used to overlap two-digit-at-a-time serial processing of the partial products/remainders. Although the logic design is relatively complex, the performance is efficient, and the advantages gained by implementing programmer-controlled precision directly in the hardware are significant.
cornea2007 URL ¿Web?	A Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic Using the Binary Encoding Format, Marius Cornea, Cristina Anderson, John Harrison, Ping Tak Peter Tang, Eric Schneider, and Charles Tsen, Proceedings of the 18th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-2854-6, ISBN 978-0-7695-2854-0, pp29–37, IEEE, June 2007. Abstract: The IEEE Standard 754-1985 for Binary Floating-Point Arithmetic was revised, and an important addition is the definition of decimal floating-point arithmetic. This is intended mainly to provide a robust, reliable framework for financial applications that are often subject to legal requirements concerning rounding and precision of the results, because the binary floating-point arithmetic may introduce small but unacceptable errors. Using binary floating-point calculations to emulate decimal calculations in order to correct this issue has led to the existence of numerous proprietary software packages, each with its own characteristics and capabilities. IEEE 754R decimal arithmetic should unify the ways decimal floating-point calculations are carried out on various platforms. New algorithms and properties are presented in this paper which are used in a software implementation of the IEEE 754R decimal floatingpoint arithmetic, with emphasis on using binary operations efficiently. The focus is on rounding techniques for decimal values stored in binary format, but algorithms for the more important or interesting operations of addition, multiplication, division, and conversions between binary and decimal floating-point formats are also outlined. Performance results are included for a wider range of operations, showing promise that our approach is viable for applications that require decimal floating-point calculations.
couleur1958 ¿Web?	BIDEC – A Binary-to-Decimal or Decimal-to-Binary Converter, J. F. Couleur, IRE Transactions on Electronic Computers, Vol. EC-7, pp313–316, IRE, 1958. Abstract: Simple, high-speed devices to convert binary, binary coded octal, or Gray code numbers to binary coded decimal numbers or vice versa is described. Circuitry required is four shift register stages per decimal digit plus one 30-diode network per decimal digit. In simple form the conversion requires two operations per binary bit but is theoretically capable of working at one operation per bit.
cowlis1984 ¿Web?	The Design of the REXX Language, M. F. Cowlishaw, IBM Systems Journal, Vol. 23 #4, pp326–335, IBM (Offprint # G321-5228), 1984. Abstract: One way of classifying computer languages is by two classes: languages needing skilled programmers, and personal languages used by an expanding population of general users. REstructured eXtended eXecutor (REXX) is a flexible personal language designed with particular attention to feedback from its users. It has proved to be effective and easy to use, yet it is sufficiently general and powerful to fulfill the needs of many demanding professional applications. REXX is system and hardware independent, so that it has been possible to integrate it experimentally into several operating systems. Here REXX is used for such purposes as command and macro programming, prototyping, education, and personal programming. This study introduces REXX and describes the basic design principles that were followed in developing it. Note: First published as IBM Hursley Technical Report TR12.223, October 1983.
cowlis2001 ¿Web?	A Decimal Floating-Point Specification, Michael F. Cowlishaw, Eric M. Schwarz, Ronald M. Smith, and Charles F. Webb, Proceedings of the 15th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-1150-3, pp147–154, IEEE, June 2001. Abstract: Even though decimal arithmetic is pervasive in financial and commercial transactions, computers are still implementing almost all arithmetic calculations using binary arithmetic. As chip real estate becomes cheaper it is becoming likely that more computer manufacturers will provide processors with decimal arithmetic engines. Programming languages and databases are expanding the decimal data types available while there has been little change in the base hardware. As a result, each language and application is defining a different arithmetic and few have considered the efficiency of hardware implementations when setting requirements. In this paper, we propose a decimal format which meets the requirements of existing standards for decimal arithmetic and is efficient for hardware implementation. We propose this specification in the hope that designers will consider providing decimal arithmetic in future microprocessors and that future decimal software specifications will consider hardware efficiencies. Note: Eric Schwarz’s Presentation foils are available here.
cowlis2002 ¿Web?	Densely Packed Decimal Encoding, Michael F. Cowlishaw, IEE Proceedings – Computers and Digital Techniques, Vol. 149 #3, ISSN 1350-2387, pp102–104, IEE, London, May 2002. Abstract: Chen-Ho encoding is a lossless compression of three Binary Coded Decimal digits into 10 bits using an algorithm which can be applied or reversed using only simple Boolean operations. An improvement to the encoding which has the same advantages but is not limited to multiples of three digits is described. The new encoding allows arbitrary-length decimal numbers to be coded efficiently while keeping decimal digit boundaries accessible. This in turn permits efficient decimal arithmetic and makes the best use of available resources such as storage or hardware registers.
cowlis2002b URL ¿Web?	The ‘telco’ benchmark, M. F. Cowlishaw, URL: `http://www2.hursley.ibm.com/decimal`, 3pp, IBM Hursley Laboratory, May 2002. Abstract: This benchmark was devised in order to investigate the balance between Input and Output (I/O) time and calculation time in a simple program which realistically captures the essence of a telephone company billing application. In summary, the application reads a large input file containing a suitably distributed list of telephone call durations (each in seconds). For each call, a charging rate is chosen and the price calculated and rounded to hundreths. One or two taxes are applied (depending on the type of call) and the total cost is converted to a character string and written to an output file. Running totals of the total cost and taxes are kept; these are displayed at the end of the benchmark for verification.
cowlis2003 URL ¿Web?	Decimal Floating-Point: Algorism for Computers, Michael F. Cowlishaw, Proceedings of the 16th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-1894-X, pp104–111, IEEE, June 2003. Abstract: Decimal arithmetic is the norm in human calculations, and human-centric applications must use a decimal floating-point arithmetic to achieve the same results. Initial benchmarks indicate that some applications spend 50% to 90% of their time in decimal processing, because software decimal arithmetic suffers a 100× to 1000× performance penalty over hardware. The need for decimal floating-point in hardware is urgent. Existing designs, however, either fail to conform to modern standards or are incompatible with the established rules of decimal arithmetic. This paper introduces a new approach to decimal floating-point which not only provides the strict results which are necessary for commercial applications but also meets the constraints and requirements of the IEEE 854 standard. A hardware implementation of this arithmetic is in development, and it is expected that this will significantly accelerate a wide variety of applications. Note: Softcopy is available in PDF.
cowlis2004 ¿Web?	Fixed, floating, and exact computation with Java's BigDecimal, M. Cowlishaw, J. Bloch, and J.D. Darcy, Dr. Dobb's Journal Vol. 29 #7, ISSN 1044-789X, pp22–27, CMP Media, July 2004. Abstract: Decimal data types are widely used in commercial, financial, and Web applications, and many general-purpose programming languages have either native decimal types or readily available decimal arithmetic packages. Since the 1.1 release, the libraries of the Java programming language supported decimal arithmetic via the Java.math.BigDecimal class. With the inclusion of JSR13 into J2SE 1.5, BigDecimal now has true floating-point operations consistent with those in the IEEE 754 revision. In this article, we first explain why decimal arithmetic is important and the differences between the BigDecimal class and binary float and double types.
crensh1998 URL ¿Web?	Integer Square Roots, Jack W. Crenshaw, Embedded Systems Programming, Vol. 11 #2, EDTN, February 1998.

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dadda2007 ¿Web?	Multioperand Parallel Decimal Adder: A Mixed Binary and BCD Approach, Luigi Dadda, IEEE Transactions on Computers, Vol. 56 #10, ISSN 0018-9340, pp1320–1328, IEEE, October 2007. Abstract: Decimal arithmetic has been in recent years revived due to the large amount of data in commercial applications. We consider the problem of Multi Operand Parallel Decimal Addition with an approach that uses binary arithmetic, suggested by the adoption of BCD numbers. This involves corrections in order to obtain the BCD result, or a binary to decimal conversion. We adopt the latter approach, particularly efficient for a large number of addends. Conversion requires a relatively small area and can afford fast operation. The BD conversion, moreover, allows an easy alignment of the sums of adjacent columns. We treat the design of BCD digit adders using fast carry free adders and the conversion problem through a known parallel scheme using elementary conversion cells. Spreadsheets have been developed for adding several BCD digits and for simulating the binary to decimal conversion as design tool.
dagg1959 ¿Web?	Decimal-Binary conversions in CORDIC, D. H. Daggett, IRE Transactions on Electronic Computers, Vol. EC-8 #5, pp335–339, IRE, September 1959. Abstract: A special-purpose, binary computer called CORDIC (COordinate Rotation DIgital Computer) contains a unique arithmetic unit composed of three shift registers, three adder-subtractors, and suitable interconnections for efficiently performing calculations involving trigonometric functions. A technique is formulated for using the CORDIC arithmetic unit to convert between angles expressed in degrees and minutes in the 8, 4, 2, 1 code and angles expressed in binary fractions of a half revolution. Decimal-to-binary conversion is accomplished through the generation of an intermediate binary code in which the variable values are +1 and 1. Each of these intermediate code variables controls the addition or subtraction of a particular binary constant in the formation of an accumulated sum which represents the angle. Examples are presented to illustrate the technique. Binary-to-decimal conversion is accomplished by applying essentially the same conversion steps in reverse order, but this feature is not discussed fully. Fundamental principles of the conversion technique, rather than details of implementation, are emphasized. The CORDIC conversion technique is sufficiently general to be applied to decimal-binary conversion problems involving other mixed radix systems and other decimal codes.
dall1994 ¿Web?	Dynamics of Arithmetic: A Connectionist View of Arithmetic Skills, Richard Z. Dallaway, ISSN 1350-3162, 159pp, CSRP 306, Univerity of Sussex, February 1994. Abstract: Arithmetic takes time. Children need five or six years to master the one hundred multiplication facts (00 to99), and it takes adults approximately one second to recall an answer to a problem like 78. Multicolumn arithmetic (e.g., 4567) requires a sequence of actions, and children produce a host of systematic mistakes when solving such problems. This thesis models the time course and mistakes of adults and children solving arithmetic problems. Two models are presented, both of which are built from connectionist components.
darcy1998 ¿Web?	Borneo 1.0.2 – Adding IEEE 754 floating-point support to Java., Joseph D. Darcy, 129pp, University of California, Berkeley, May 1998. Abstract: The design of Java relies heavily on experiences with programming languages past. Major Java features, including garbage collection, object-oriented programming, and strong static type checking, have all proven their worth over many years. However, Java breaks with tradition in its floating-point support; instead of accepting whatever floating point formats a machine might provide, Java mandates use of the nearly ubiquitous IEEE Standard for Binary Floating-Point Arithmetic (IEEE 754-1985). Unfortunately, Java’s specification creates two problems for numerical computation: only a strict subset of IEEE 754’s required features are supported by Java and Java’s bit-for-bit reproducibility goals for floating-point computation cause significant performance penalties on popular architectures. Java forbids using some distinguishing features of IEEE 754, features designed to make building robust numerical software by numerical experts and novices alike easier than in the past. Only simple floating-point features common to IEEE 754 and obsolete floating-point formats are allowed. Legitimate differences exist among various standard-conforming realizations of IEEE 754. For example, the x86 processor family supports the IEEE 754 recommended 80 bit double extended format in addition to the float and double formats found on other architectures. In many instances, using the double extended format for intermediate results leads to more robust programs. To support its “write once, run anywhere” goals, Java specifies that only the float and double formats be used for intermediate results in numeric expressions. For recent x86 processors to emulate exactly a machine that only uses float and double entails a significant performance penalty; over an order of magnitude degradation has been reported. An analogous situation arises on architectures such as the PowerPC that support a fused multiply accumulate instruction; Java semantics preclude using a hardware feature that would usually give more accurate answers faster. However, even numerical analysts do not need or desire exact reproducibility in all cases. The disallowed x86 features were designed to allow numerically unsophisticated programs to have a better likelihood of getting reasonable results. To address these concerns, the Java dialect Borneo is able to express all required features of IEEE 754. Borneo also aims to run efficiently on multiple hardware implementations of IEEE 754 and to allow convenient construction of new numeric types.
davis1952 ¿Web?	Automatic Recognition of Spoken Digits, K. Davis, R. Biddulph, and S. Balashek, Journal of the Acoustical Society of America, Vol. 24 (Possibly:* American Journal of Otolaryngology, Vol. 24.), pp637–642, ASA, November 1952. Abstract:* The recognizer discussed will automatically recognize telephone-quality digits spoken at normal speech rates by a single individual, with an accuracy varying between 97 and 99 percent. After some preliminary analysis of the speech of any individual, the circuit can be adjusted to deliver a similar accuracy on the speech of that individual. The circuit is not, however, in its present configuration, capable of performing equally well on the speech of a series of talkers without recourse to such adjustment. Circuitry involves division of the speech spectrum into two frequency bands, one below and the other above 900 cps. Axis-crossing counts are then individually made of both band energies to determine the frequency of the maximum syllabic rate energy within each band. Simultaneous two-dimensional frequency portrayal is found to possess recognition significance. Standards are then determined, one for each digit of the ten-digit series, and are built into the recognizer as a form of elemental memory. By means of a series of calculations performed automatically on the spoken input digit, a best match type comparison is made with each of the ten standard digit patterns and the digit of best match selected.
dec1990 ¿Web?	Software Product Description: COBOL-81/RSTS/E, Version 3.1, DEC, 3pp, Digital Equipment Corporation, December 1990. Abstract: COBOL-81/RSTS/E is a high-level language for business data processing that operates under control of the RSTS/E Operating System. It is based on the 1985 ANSI COBOL Standard X3.23-1985 and includes all of the features necessary to achieve the intermediate level of that standard. COBOL-81/RSTS/E is a subset of VAX COBOL and includes various Digital Equipment Corporation extensions to COBOL, including screen handling at the source language level. COBOL-81/RSTS/E also supports the ANSI-1974 standard, and both standards are switch selectable using the /STA:V2 or /STA:85 switches.
dec1992 ¿Web?	Software Product Description: VAX 9000 Series Diagnostic Set, DEC, 3pp, Digital Equipment Corporation, April 1992. Abstract: VAX 9000 Series Diagnostic Set is a package of programs that allows users to maintain a VAX 9000 system. These diagnostics test all subsystems of the VAX 9000 system including the Power Control System, Service Processor System, CPU, Memory, I/O Adapters, and peripheral devices. The package includes firmwarebased tests, service-processor-based tests, and macrodiagnostics
delury1958 ¿Web?	Computation with Approximate Numbers, Daniel B. Delury, The Mathematics Teacher 51, pp521–530, November 1958. Abstract: There is room, I think, for the view that it is improper to speak at all of “approximate numbers”... Note: Reprinted with permission of the Canadian School.
dietmeyer1968 ¿Web?	Generating prime implicants via ternary encoding and decimal arithmetic, D. L. Dietmeyer and J. R. Duley, Communications of the ACM, Vol. 11 #7, ISSN 0001-0782, pp520–523, ACM Press, July 1968. Abstract: Decimal arithmetic, ternary encoding of cubes, and topological considerations are used in an algorithm to obtain the extremals and prime implicants of Boolean functions. The algorithm, which has been programmed in the FORTRAN language, generally requires less memory than other minimization procedures, and treats DON’T CARE terms in an efficient manner.
doring1997 ¿Web?	Decimal Adjustment of Long Numbers in Constant Time, Andreas Döring and Wolfgang J. Paul, Information Processing Letters, Vol. 62 #3, pp161–163, Elsevier Science B.V., June 1997. Abstract: We propose a very simple method for adding and subtracting n-digit binary coded decimal (BCD) numbers with a small constant number of ordinary operations of a 4n-bit binary ALU. With this method addition/subtraction of 8-digit decimal numbers on an intel 486 processor is faster than programs that use the special built-in operations for decimal adjustment.
duale2007 URL ¿Web?	Decimal floating-point in z9: An implementation and testing perspective, A. Y. Duale, M. H. Decker, H.-G. Zipperer, M Aharoni, and T. J. Bohizic, IBM Journal of Research and Development, Vol. 51 #1/2, ISSN 0018-8646, pp217–227, IBM, January 2007. Abstract: Although decimal arithmetic is widely used in commercial and financial applications, the related computations are handled in software. As a result, applications that use decimal data may experience performance degradations. Use of the newly defined decimal floating-point (DFP) format instead of binary floating-point is expected to significantly improve the performance of such applications. System z9� is the first IBM machine to support the DFP instructions. We present an overview of this implementation and provide some measurement of the performance gained using hardware assists. Various tools and techniques employed for the DFP verification on unit, element, and system levels are presented in detail. Several groups within IBM collaborated on the verification of the new DFP facility, using a common reference model to predict DFP results.
duham1987 ¿Web?	Atari System Reference Manual, section 11, Bob DuHamel, Atari, 1987. Abstract: The routines which do floating point arithmetic are a part of the operating system ROM. The Atari computer uses the 6502’s decimal math mode. This mode uses numbers represented in packed Binary Coded Decimal (BCD). This means that each byte of a floating point number holds two decimal digits. The actual method of representing a full number is complicated and probably not very important to a programmer. However, for those with the knowledge to use it, the format is given below... Note: 6 bytes: 10-digit BCD, 7-bit excess-64 exponent.
duke1969 ¿Web?	Decimal Floating Point Processor, K. A. Duke, IBM Technical Disclosure Bulletin, 11-69, pp862–862, IBM, November 1969. Abstract: A numerical processor can be built which operates on floating-point numbers where the mantissa is an integer and the characteristic represents a power of 10 by which that integer must be multiplied. Thus, decimal numbers can be represented exactly without conversion errors. Such floating point numbers are expressed as N = (-1)/S/ x 10/X/ x I where S = sign bit, X = exponent, and I = integer.

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ecma2001 ¿Web?	C# Language Specification, Rex Jaeschke, ECMA-TC39-TG2-2001, 520pp, ECMA, September 2001. Abstract: This International Standard specifies the form and establishes the interpretation of programs written in the C# programming language. It specifies: The representation of C# programs; The syntax and constraints of the C# language; The semantic rules for interpreting C# programs; The restrictions and limits imposed by a conforming implementation of C#. Note: Final draft submitted for ECMA GA approval December 2001.
edgar1979 ¿Web?	FOCUS Microcomputer Number System, Albert D. Edgar and Samuel C. Lee, Communications of the ACM Vol. 22 #3, pp166–177, ACM Press, March 1979. Abstract: FOCUS is a number system and supporting computational algorithms especially useful for microcomputer control and other signal processing applications. FOCUS has the wide-ranging character of floating-point numbers with a uniformity of state distributions that give FOCUS better than a twofold accuracy advantage over an equal word length floating-point system. FOCUS computations are typically five times faster than single precision fixed-point or integer arithmetic for a mixture of operations, comparable in speed with hardware arithmetic for many applications. Algorithms for 8-bit and 16-bit implementations of FOCUS are included.
eisen2007 ¿Web?	IBM POWER6 accelerators: VMX and DFU, L. Eisen, J. W. Ward III, H.-W. Tast, N. M�ding, J. Leenstra, S. M. Mueller, C. Jacobi, J. Preiss, E. M. Schwarz, and S. R. Carlough, IBM Journal of Research and Development Vol. 51 #6, pp663–684, IBM, November 2007. Abstract: The IBM POWER6 microprocessor core includes two accelerators for increasing performance of specific workloads. The vector multimedia extension (VMX) provides a vector acceleration of graphic and scientific workloads. It provides single instructions that work on multiple data elements. The instructions separate a 128-bit vector into different components that are operated on concurrently. The decimal floating-point unit (DFU) provides acceleration of commercial workloads, more specifically, financial transactions. It provides a new number system that performs implicit rounding to decimal radix points, a feature essential to monetary transactions. The IBM POWER processor instruction set is substantially expanded with the addition of these two accelerators. The VMX architecture contains 176 instructions, while the DFU architecture adds 54 instructions to the base architecture. The IEEE 754R Binary Floating-Point Arithmetic Standard defines decimal floating-point formats, and the POWER6 processor—on which a substantial amount of area has been devoted to increasing performance of both scientific and commercial workloads—is the first commercial hardware implementation of this format.
erle2002 ¿Web?	Potential Speedup with Decimal Floating-Point Hardware, Mark A Erle, Michael J Schulte, and J G Linebarger, Proceedings of the Thirty Sixth Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, pp1073–1077, IEEE Press, November 2002. Abstract: This paper address the potential speedup achieved by using decimal floating-point hardware, instead of software routines, on a high-performance super-scalar architecture. Software routines were written to performag decimal addition, subtraction, multiplication, and division. Cycle counts were then measured for each instruction using the Simplescalar simulator. After this, new hardware algorithms were developed, existing algorithms were analyzed, and cycle counts were estimated for the same set of instructions using specialized decimal floating-point hardware. This data was then used to show the potential speedup obtained for programs with different instruction mixes and a recently developed benchmark.
erle2003 ¿Web?	Decimal Multiplication Via Carry-Save Addition, Mark A Erle and Michael J Schulte, Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, the Hague, Netherlands,, pp348–358, IEEE Computer Society Press, June 2003. Abstract: Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This paper presents two novel designs for fixed-point decimal multiplication that utilize decimal carry-save addition to reduce the critical path delay. First, a multiplier that stores a reduced number of multiplicand multiples and uses decimal carry-save addition in the iterative portion of the design is presented. Then, a second multiplier design is proposed with several notable improvements including fast generation of multiplicand multiples that do not need to be stored, the use of decimal (4:2) compressors, and a simplified decimal carry-propagate addition to produce the final product. When multiplying two n-digit operands to produce a 2n-digit product, the improved multiplier design has a worst-case latency of n + 4 cycles and an initiation interval of n + 1 cycles. Three data-dependent optimizations, which help reduce the multipliers’ average latency, are also described. The multipliers presented can be extended to support decimal floating-point multiplication.
erle2005 ¿Web?	Decimal Multiplication With Efficient Partial Product Generation, Mark A Erle, Eric Schwarz, and Michael J Schulte, Proceedings of the 17th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-2366-8, pp21–28, IEEE, June 2005. Abstract: Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This paper presents a novel design for fixed-point decimal multiplication that utilizes a simple recoding scheme to produce signed-magnitude representations of the operands thereby greatly simplifying the process of generating partial products for each multiplier digit. The partial products are generated using a digit-by-digit multiplier on a word-by-digit basis, first in a signed-digit form with two digits per position, and then combined via a combinational circuit. As the signed-digit partial products are developed one at a time while traversing the recoded multiplier operand from the least significant digit to the most significant digit, each partial product is added along with the accumulated sum of previous partial products via a signed-digit adder. This work is significantly different from other work employing digit-by-digit multipliers due to the efficiency gained by restricting the range of digits throughout the multiplication process.
erle2007 URL ¿Web?	Decimal Floating-Point Multiplication Via Carry-Save Addition, Mark A. Erle, Michael J. Schulte, and Brian J. Hickmann, Proceedings of the 18th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-2854-6, ISBN 978-0-7695-2854-0, pp46–55, IEEE, June 2007. Abstract: Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This paper presents the design of a decimal floating-point multiplier that complies with specifications for decimal multiplication given in the draft revision of the IEEE 754 Standard for Floating-point Arithmetic (IEEE 754R). This multiplier extends a previously published decimal fixedpoint multiplier design by adding several features including exponent generation, sticky bit generation, shifting of the intermediate product, rounding, and exception detection and handling. The core of the decimal multiplication algorithm is an iterative scheme of partial product accumulation employing decimal carry-save addition to reduce the critical path delay. Novel features of the proposed multiplier include support for decimal floating-point numbers, on-thefly generation of the sticky bit, early estimation of the shift amount, and efficient decimal rounding. Area and delay estimates are provided for a verified Verilog register transfer level model of the multiplier.
euro1997 URL ¿Web?	The Introduction of the Euro and the Rounding of Currency Amounts, European Commission, 29pp, European Commission Directorate General II Economic and Financial Affairs, 1997. Abstract: The rounding rules laid down in the legal framework of the euro are an integral part of the monetary law of the euro area. The legal equality of the euro unit and the national currency units is based on their application and the application of the conversion rates. The basic rules laid down in the Council Regulation (EC) No 1103/97 are...
euro1998 URL ¿Web?	The Introduction of the Euro and the Rounding of Currency Amounts, European Commission Directorate General II, II/28/99-EN Euro Papers No. 22., 32pp, DGII/C-4-SP(99) European Commission, March 1998, February 1999. Abstract: The purpose of the present document is to respond in a systematic manner to the various questions on rounding which the Commission services have received since the adoption of the Council regulation on certain provisions relating to the introduction of the euro in June 1997. 4 To this end it tries to clarify the interpretation of the rounding provisions in the legal framework of the euro and to give guidance on technical aspects of rounding.

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fenw1972
¿Web?

A Binary Representation for Decimal Numbers, Peter M. Fenwick, Australian Computer Journal, Vol. 4 #4 (now Journal of Research and Practice in Information Technology), pp146–149, Australian Computer Society Inc., November 1972.

Abstract: A number system is described which combines the programming convenience of decimal numbers with the hardware advantages of binary arithmetic. The number format resembles some integer floating-point formats, except that the exponent is associated with a base of 10, rather than some power of 2. It is shown that arithmetic in the new representation is little more difficult than for ordinary floating-point numbers, and methods are given for implementing the “decimal” shifts which are a consequence of the exponent base.

frankl1972
¿Web?

Zoned Decimal Arithmetic, J. W. Franklin, IBM Technical Disclosure Bulletin, 12-72, pp2123–2124, IBM, December 1972.

Abstract: A means is described for performing arithmetic on zoned decimal data that does not require additional storage space for the intermediate result, and which preserves both operands until it is determined that the operation has been performed correctly and successfully.

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gay1990 URL ¿Web?	Correctly Rounded Binary-Decimal and Decimal-Binary Conversions, David M. Gay, Numerical Analysis Manuscript 90-10, 16pp, AT&T Bell Laboratories, November 1990. Abstract: This note discusses the main issues in performing correctly rounded decimal-to-binary and binary-to-decimal conversions. It reviews recent work by Clinger and by Steele and White on these conversions and describes some efficiency enhancements. Computational experience with several kinds of arithmetic suggests that the average computational cost for correct rounding can be small for typical conversions. Source for conversion routines that support this claim is available from netlib.
glads1991 ¿Web?	A method of designing a decimal arithmetic processor, M. A. Gladshtein, Automatic Control and Computer Sciences, Vol. 25 #6, pp51–56, 1991. Abstract: The advantages and drawbacks of binary numeric coding in digital computers have been considered. This type of coding has been shown ineffective in processing large data arrays especially when represented in the floating-point form. Also, the low efficiency of conventionally employed decimal computational procedures using the so-called corrections has been noted. It has been proposed, in designing digital computers, to renounce the principle of binary computations in favor of decimal operations on the basis of stored addition and multiplication tables using binary-decimal numeric coding. A version of circuit design for a decimal processor, algorithms and microprograms for addition and multiplication operations have been described. Advantages inherent in the method proposed have been analyzed. Note: Translated from Avtomatika i Vychislitel’naya Tekhnika UDC 681.3.48.
gold1967 ¿Web?	27 Bits Are Not Enough for 8-Digit Accuracy, I. Bennett Goldberg, Communications of the ACM, Vol. 10 #2, pp105–106, ACM Press, February 1967. Abstract: From the inequality 10⁸ < 2²⁷, we are likely to conclude that we can represent 8-digit decimal floating-point numbers accurately by 27-bit [binary] floating-point numbers. However, we need 28 significant bits to represent some 8-digit numbers accurately. In general, we can show that if 10^p < 2^q-1, then q significant bits are always enough for p-digit decimal accuracy. Finally, we can define a compact 27-bit floating-point representation that will give 28 significant bits, for numbers of practical importance.
gold1992 ¿Web?	The Design of Floating-Point Data Types, David Goldberg, ACM Letters on Programming Languages and Systems, Vol. 1 #2, pp138–151, ACM Press, June 1992. Abstract: The issues involved in designing the floating-point part of a programming language are discussed. Looking at the language specifications for most existing languages might suggest that this design involves only trivial issues, such as whether to have one or two types of REALs or how to name the functions that convert from INTEGER to REAL. It is shown that there are more significant semantic issues involved. After discussing the trade-offs for the major design decisions, they are illustrated by presenting the design of the floating-point part of the Modula-3 language.
golds1946 ¿Web?	The Electronic Numerical Integrator and Computer (ENIAC), H. H. Goldstine and Adele Goldstine, IEEE Annals of the History of Computing, Vol. 18 #1, pp10–16, IEEE, 1996. Abstract: It is our purpose in the succeeding pages to give a brief description of the ENIAC and an indication of the kinds of problems for which it can be used. This general purpose electronic computing machine was recently made public by the Army Ordnance Department for which it was developed by the Moore School of Electrical Engineering. The machine was developed primarily for the purpose of calculating firing tablcs for the armed forces. Its design is, however, sufficiently general to permit the solution of a large class of numerical problems which could hardly be attempted by more conventional computing tools. In order easily to obtain sufficient accuracy for scientific computations, the ENIAC was designed as a digital device. The equipment normally handles signed 10-digit numbers expressed in the decimal system. It is, however, so constructed that operations with as many as 20 digits are possible. The machine is automatically sequenced in the sense that all instructions needed to carry out a computation are given to it before the computation commences. It will be seen below how these instructions are given to the machine. Note: Reprinted from Mathematical Tables and Other Aids to Computation, 1946.
gord1998 URL ¿Web?	A Calculated Look at Fixed-Point Arithmetic, Robert Gordon, Embedded Systems Programming, Vol. 11 #4, pp72–78, Miller Freeman, Inc, April 1998. Abstract: This article explores the subject of fixed-point numbers and presents techniques you can use to implement efficient, fixed-precision number applications.
grau1962 ¿Web?	On a Floating-Point Number Representation For Use with Algorithmic Languages, A. A. Grau, Communications of the ACM, Vol. 5 #3, pp160–161, ACM Press, March 1962. Abstract: Algorithmic languages, such as ALGOL, make provision for two types of numbers, real and integer, which are usually implemented on the computer by means of floating-point and fixed-point numbers respectively. The concepts real and integer, however, are taken from mathematics, where the set of integers forms a proper subset of the set of real numbers. In implementation a real problem is posed by the fact that the set of fixed-point numbers is not a proper subset of the set of floating-point numbers; this problem becomes very apparent in attempts to implement ALGOL 60. Furthermore, the one mathematical operation of addition is implemented in the machine by one of two machine operations, fixed-point addition or floating-point addition. ...
gray2003 ¿Web?	Before the B5000: Burroughs Computers, 1951-1963, George T. Gray and Ronald Q. Smith, IEEE Annals of the History of Computing, Vol. 25 #2, pp50–61, IEEE, April-June 2003. Abstract: Like many companies entering the computer industry, Burroughs began by working on US government contracts. Once sufficient expertise had been gained, the company entered the general purpose computer market. The Datatron computer, obtained through the ElectroData Corporation acquisition, was a modest success in the late 1950s; however, pioneering work on transistor computers for military contracts was not immediately transferred to the commercial marketplace.
griff1981 ¿Web?	Binary to Decimal Conversion, L. K. Griffiths, IBM Technical Disclosure Bulletin, 06-81, pp237–238, IBM, June 1981. Abstract: Binary to decimal conversion can be achieved by multiplying 1/10 as 51/512 x 256/255 and using the fact that 256/255 = 1 + 1/256 + 1/256² ..., i.e., 256/255 = 257-256 rounded up. This method can be performed efficiently on short word computers with only adding and shifting operations, i.e., first multiplying by 51/512 and then correcting by multiplying by 256/255.
guedj1996 ¿Web?	Numbers: The Universal Language, Denis Guedj, ISBN 0-8109-2845-0, 176pp, Harry N. Abrams, Inc, 1997. Abstract: Numbers, like letter forms, have a rich and complex history. Who first invented them? How old are they, and how were they developed? ... With Chronology and Glossary. Many referenced illustrations. Note: Translated from the French (Empire des nombres) by Lory Frankel.

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hack2004 URL ¿Web?	On Intermediate Precision Required for Correctly-Rounding Decimal-to-Binary Floating-Point Conversion., Michel Hack, Proceedings of RNC6 (6th conference on Real Numbers and Computers), URL: `http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_10_hack.pdf`, 22pp, University of Trier, November 2004. Abstract: The algorithms developed ten years ago in preparation for IBM�s support of IEEE Floating-Point on its mainframe S/390 processors use an overly conservative intermediate precision to guarantee correctly-rounded results across the entire exponent range. Here we study the minimal requirement for both bounded and unbounded precision on the decimal side (converting to machine precision on the binary side). An interesting new theorem on Continued Fraction expansions is offered, as well as an open problem on the growth of partial quotients for ratios of powers of two and five.
hamilton1954 ¿Web?	The IBM Magnetic Drum Calculator Type 650, F. E. Hamilton and E. C. Kubie, Journal of the ACM, Vol. 1 #1, pp13–20, ACM Press, January 1954. Abstract: The IBM Magnetic Drum Calculator Type 650 is an electronic calculator intermediate in speed, capacity and cost. It takes a logical position between the IBM Card Programmed Electronic Calculator and the IBM Electronic Data Processing Machines Type 701. It is a more powerful computing tool as required by those who have “outgrown” the Card Programmed Electronic Calculator. It is also a machine which may be used economically by those who are not as yet ready for a large scale computer such as the 701. It will serve not only to perform their required computing tasks, but it will also result in gaining valuable experience for later use of large scale equipment. The Magnetic Drum Calculator, through its stored program control, comprehensive order list, punched card input-output, self-checking and moderate memory capacity, gains the flexibility required of a computer which is to serve in both the commercial and scientific computing fields...
hansen1994 ¿Web?	Multiple-length Division Revisited: a Tour of the Minefield, Per Brinch Hansen, Software -- Practice and Experience Vol. 24 #6, pp579–601, John Wiley & Sons, June 1994. Abstract: Long division of natural numbers plays a crucial role in Cobol arithmetic, cryptography, and primality testing. Only a handful of textbooks discuss the theory and practice of long division, and none of them do it satisfactorily. This tutorial attempts to fill this surprising gap in the literature on computer algorithms. We illustrate the subtleties of long division by examples, define the problem concisely, summarize the theory, and develop a complete Pascal algorithm using a consistent terminology.
hanson1997 URL ¿Web?	Economical Correctly Rounded Binary Decimal Conversions, Kenton Hanson, URL: `http://www.dnai.com/~khanson/ECRBDC.html`, 5pp, 1997. Abstract: Economical correctly rounded binary to decimal and decimal to binary conversions simplifies computing environments. Undue confusion and inaccuracies can occur with less precise conversions. Correct conversions can easily be guaranteed with very large precision arithmetic, but may cause performance and space penalties. Mostly correct conversions can be achieved with machine arithmetic. We demonstrate that correctly rounded conversions can be guaranteed with a minimum amount of extra precision arithmetic. An efficient algorithm for finding the most difficult conversions is described in detail. We then use these results to show how correct conversions can be guaranteed with a minimum of extra precision. Most normal conversions only require native machine arithmetic. Determining when extra precision is needed is straightforward. Note: Only available as a web page.
haven1980 ¿Web?	Decimal to Binary Floating Point Number Conversion Mechanism, J. W. Havender, IBM Technical Disclosure Bulletin, 07-80, pp706–708, IBM, July 1980. Abstract: Floating point numbers may be converted from decimal to binary using a high speed natural logarithm and exponential function calculation mechanism and a fixed point divide/multiply unit. The problem solved is to convert numbers expressed in a radix 10 floating point form to numbers expressed in a radix 2 floating point form.
hickmann2007 ¿Web?	A Parallel IEEE P754 Decimal Floating-Point Multiplier, Brian J. Hickmann, Andrew Krioukov, Michael J. Schulte, and Mark A. Erle, Proceedings of the IEEE International Conference on Computer Design 2007, pp296–303, IEEE, October 2007. Abstract: Decimal floating-point multiplication is important in many commercial applications including banking, tax calculation, currency conversion, and other financial areas. This paper presents a fully parallel decimal floating-point multiplier compliant with the recent draft of the IEEE P754 Standard for Floating-point Arithmetic (IEEE P754). The novelty of the design is that it is the first parallel decimal floating-point multiplier offering low latency and high throughput. This design is based on a previously published parallel fixed-point decimal multiplier which uses alternate decimal digit encodings to reduce area and delay. The fixed-point design is extended to support floating-point multiplication by adding several components including exponent generation, rounding, shifting, and exception handling. Area and delay estimates are presented that show a significant latency and throughput improvement with a substantial increase in area as compared to the only published IEEE P754 compliant sequential floating-point multiplier. To the best of our knowledge, this is the first publication to present a fully parallel decimal floating-point multiplier that complies with IEEE P754.
holm1997 ¿Web?	Composite Arithmetic: Proposal for a New Standard, W. Neville Holmes, IEEE Computer, pp65–73, IEEE, March 1997. Abstract: A general-purpose arithmetic standard could give general computation the kind of reliability and stability that the floating-point standard brought to scientific computing. The author describes composite arithmetic as a possible starting point.
hp71ref1987a ¿Web?	Math Reference, Hewlett Packard Company, HP-71 Reference Manual, Mfg. # 0071-90110, Reorder # 0071-90010, pp317–318, Hewlett Packard Company, October 1987. Note: First edition October 1983. Subsections describe the numeric precisions available and the range of representable numbers. Manual available from The Museum of HP Calculators (`www.hpmuseum.org`).
hp71ref1987b ¿Web?	The IEEE Proposal for Handling Math Exceptions, Hewlett Packard Company, HP-71 Reference Manual, Mfg. # 0071-90110, Reorder # 0071-90010, pp338–345, Hewlett Packard Company, October 1987. Abstract: The IEEE Radix Independent Floating-Point Proposal divides all of the floating-point “exceptional events” encountered in calculations into five classes of math exceptions: invalid operation, division by zero, overflow, underflow, and inexact result. Associated with each math exception is a flag that is set by the HP-71 whenever an exception is encountered. These flags remain set until you clear them. Each of these flags can be accessed by its number or its name. Note: First edition October 1983. Manual available from The Museum of HP Calculators (`www.hpmuseum.org`).
hp71spec1983 ¿Web?	Chapter 13 – Internal Data Representations, Hewlett Packard Company, Software Internal Design Specification for the HP-71, Vol. 1 Part #00071-90068, pp13.1–13.17, Hewlett Packard Company, December 1983. Abstract: This chapter discusses the format in which the HP-71 represents numeric or string data in memory or in the CPU registers. Note: Manual available from The Museum of HP Calculators (`www.hpmuseum.org`).
hull1978 ¿Web?	Desirable Floating-Point Arithmetic and Elementary Functions for Numerical Computation, T. E. Hull, ACM Signum Newsletter, Vol. 14 #1 (Proceedings of the SIGNUM Conference on the Programming Environment for Development of Numerical Software), pp96–99, ACM Press, 1978. Abstract: The purpose of this talk is to summarize proposed specifications for floating-point arithmetic and elementary functions. The topics considered are: the base of the number system, precision control, number representation, arithmetic operations, other basic operations